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| author | Nishad Kamdar <[email protected]> | 2018-11-09 13:07:18 +0530 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2018-11-11 15:29:50 +0000 |
| commit | 72e3a5248da9046d17aec9366976a3ec45ceeb3c (patch) | |
| tree | 2d5a032d483b2293d5890b87fe424f2e8c4fcd87 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 06c77f564ddb6a3f4a2553c02c36d62cc1a596f7 (diff) | |
staging: iio: ad7816: Set RD/WR pin and CONVST pin as outputs.
The RD/WR pin and CONVST pin are logical inputs to the AD78xx
chip as per the datasheet. Hence convert them to outputs.
Signed-off-by: Nishad Kamdar <[email protected]>
Signed-off-by: Jonathan Cameron <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions