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authorNicholas Kazlauskas <[email protected]>2024-04-16 11:24:05 -0400
committerAlex Deucher <[email protected]>2024-04-30 09:54:16 -0400
commit47745acc5e8dd9b92dc877d3436801106c5e6864 (patch)
tree71f9e847975589b5a8d4907eb28326e3a0d0d7ba /tools/perf/scripts/python/bin/stackcollapse-report
parent9ba971b25316b7e3a11b63b770a3a48bf3b69904 (diff)
drm/amd/display: Add trigger FIFO resync path for DCN35
[Why] FIFO error can occur if we don't trigger a DISPCLK change after touching K1/K2 dividers. For 4k144 eDP + hotplug of USB-C DP display we see FIFO underflow. [How] We have the path to trigger the resync as the workaround in DCN314/DCN32, it just needs to be ported over to DCN35. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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