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authorMikita Lipski <[email protected]>2018-02-21 16:57:10 -0500
committerAlex Deucher <[email protected]>2018-04-11 13:07:40 -0500
commit3722c794641f91e0b960dd901d6c5d2f3cc24080 (patch)
treea01ed59c2c97661d3e1b033056b15f983791815f /tools/perf/scripts/python/bin/stackcollapse-report
parent6133470c8e2ffdc6a5d67a1d79a9a0c1c0a94a10 (diff)
drm/amd/display: Implementing new bandwidth registers for DCE120
Registers are added and defined. Programmed to default values. Stutter level watermark register is being set to calculated value. Urgent level registers are programmed to the same as urgency. The programming of the registers is not expected to have any functional difference in performance. Signed-off-by: Mikita Lipski <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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