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authorDaniele Ceraolo Spurio <[email protected]>2023-05-02 09:38:54 -0700
committerDaniele Ceraolo Spurio <[email protected]>2023-05-04 04:02:00 -0700
commit31cc65b4c7e37eaf645be2d5fdcade56e3fdf8f2 (patch)
treefceed8db25385fa84406cfe81b6312cd7ecc406b /tools/perf/scripts/python/bin/stackcollapse-report
parent8a9bf29546a13efd3ed7784b890c2534e995348f (diff)
drm/i915/gsc: add support for GSC proxy interrupt
The GSC notifies us of a proxy request via the HECI2 interrupt. The interrupt must be enabled both in the HECI layer and in our usual gt irq programming; for the latter, the interrupt is enabled via the same enable register as the GSC CS, but it does have its own mask register. When the interrupt is received, we also need to de-assert it in both layers. The handling of the proxy request is deferred to the same worker that we use for GSC load. New flags have been added to distinguish between the init case and the proxy interrupt. v2: Make sure not to set the reset bit when enabling/disabling the GSC interrupts, fix defines (Alan) v3: rebase on proxy status register check Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Reviewed-by: Alan Previn <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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