diff options
| author | [email protected] <[email protected]> | 2008-09-05 18:02:18 -0700 |
|---|---|---|
| committer | Ingo Molnar <[email protected]> | 2008-10-16 16:53:08 +0200 |
| commit | 26afe5f2fbf06ea0765aaa316640c4dd472310c0 (patch) | |
| tree | aa9592aa1df9c30058904f3964af72be592c0f63 /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 4588c1f0354ac96a358b3f9e8e4331c51cf3336f (diff) | |
x86: HPET_MSI Initialise per-cpu HPET timers
Initialize a per CPU HPET MSI timer when possible. We retain the HPET
timer 0 (IRQ 0) and timer 1 (IRQ 8) as is when legacy mode is being used. We
setup the remaining HPET timers as per CPU MSI based timers. This per CPU
timer will eliminate the need for timer broadcasting with IRQ 0 when there
is non-functional LAPIC timer across CPU deep C-states.
If there are more CPUs than number of available timers, CPUs that do not
find any timer to use will continue using LAPIC and IRQ 0 broadcast.
Signed-off-by: Venkatesh Pallipadi <[email protected]>
Signed-off-by: Shaohua Li <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions