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| author | AngeloGioacchino Del Regno <[email protected]> | 2022-12-14 14:11:16 +0100 |
|---|---|---|
| committer | Matthias Brugger <[email protected]> | 2023-01-09 17:16:48 +0100 |
| commit | 1bd1d10d1c0cbb82ae42c5255821202e045e4c2b (patch) | |
| tree | 3afba76f3009883a9b14dd258b379e2cb960279d /tools/perf/scripts/python/bin/stackcollapse-report | |
| parent | 4f5fc078ac6fbca1c25c9dfdbe2f98e45e80d23d (diff) | |
arm64: dts: mediatek: mt8195: Use P1 clocks for PCIe1 controller
Despite there being some flexibility regarding the P0/P1 connections,
especially for TL and PERI, we must use P1 clocks on pcie1 otherwise
we'll be dealing with unclocked access.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-report')
0 files changed, 0 insertions, 0 deletions