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authorAlvin Lee <[email protected]>2022-05-06 15:57:09 -0400
committerAlex Deucher <[email protected]>2022-06-21 18:17:24 -0400
commit04e6931a76e592e66e1014ffe4d13303ccac5d8b (patch)
tree73efde6307027ec3a031e13b2443ab48a5d98c30 /tools/perf/scripts/python/bin/stackcollapse-report
parent074efb5cadcb3c9e40d536a730318bfab3384cad (diff)
drm/amd/display: Update DPPCLK programming sequence
[Description] - When lowering DPPCLK, we want to program the DPP DTO before updating the DPP refclk. - Also update DPPCLK to the exact frequency that will be set after clock divider has been programmed. This will prevent rounding errors when making the request to PMFW (we need DPP DTO to match exactly with the exact DPP refclk). Tested-by: Daniel Wheeler <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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