Staging: rtl8192e: Remove parentheses around the right hand side of assignments

Avoid useless parentheses to the right hand side of an assignment.
Issue found using coccinelle.
The semantic patch that fixes the problem is as follows

// <smpl>
@r1 disable paren@
expression value,e;
@@

(
- value = (e)
+ value = e
)

@r2 depends on r1@
expression value,e;
constant c;
@@

(
- value = (e == c)
+ value = (e == c)
|
- value = (e <= c)
+ value = (e <= c)
|
- value = (e >= c)
+ value = (e >= c)
|
- value = (e != c)
+ value = (e != c)
)
// </smpl>

Signed-off-by: Bhanusree Pola <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>

0 files changed, 0 insertions, 0 deletions