diff options
| author | Alexandre Belloni <[email protected]> | 2018-07-31 16:38:53 +0200 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2018-07-31 15:41:14 +0100 |
| commit | f09757ab401ff332030f8e3a41cec6a44e6d9461 (patch) | |
| tree | 4795cd87d9a1585d105fc641b80ed1e1d507e39e /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | baec8eb323cd59d1bfe148a287610819d5897838 (diff) | |
spi: dw: document Microsemi integration
The integration of the Designware SPI controller on Microsemi SoCs requires
an extra register set to be able to give the IP control of the SPI
interface.
Cc: Rob Herring <[email protected]>
Signed-off-by: Alexandre Belloni <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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