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| author | Moses Christopher Bollavarapu <[email protected]> | 2022-02-19 19:32:34 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2022-02-21 18:13:37 +0100 |
| commit | c4b5dfd8403bd29ba34b9173a1e4e2f3ee655ce2 (patch) | |
| tree | 768a0332ccfb2d433f7688508d46e4be1fef436c /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 1a461527f6bc4b0e29b4badb64b7d1f1fc9437ae (diff) | |
staging: rtl8192e: use BIT macro instead of left shifting
There is a BIT(nr) macro available in vdso/bits.h
which is doing the same left shift operation
Example: (1 << 7) == BIT(7)
Reviewed-by: Dan Carpenter <[email protected]>
Signed-off-by: Moses Christopher Bollavarapu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions