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authorDouglas Leung <[email protected]>2017-07-27 18:08:58 +0200
committerRalf Baechle <[email protected]>2017-08-29 15:21:56 +0200
commitb3b8e1eb27c523e32b6a8aa7ec8ac4754456af57 (patch)
tree87da86e4f68ed35116c12c31c8b89e6421717732 /tools/perf/scripts/python/bin/stackcollapse-record
parentae11c0619973ffd73a496308d8a1cb5e1a353737 (diff)
MIPS: math-emu: <MADDF|MSUBF>.S: Fix accuracy (32-bit case)
Implement fused multiply-add with correct accuracy. Fused multiply-add operation has better accuracy than respective sequential execution of multiply and add operations applied on the same inputs. This is because accuracy errors accumulate in latter case. This patch implements fused multiply-add with the same accuracy as it is implemented in hardware, using 64-bit intermediate calculations. One test case example (raw bits) that this patch fixes: MADDF.S fd,fs,ft: fd = 0x22575225 fs = ft = 0x3727c5ac Fixes: e24c3bec3e8e ("MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction") Fixes: 83d43305a1df ("MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction") Signed-off-by: Douglas Leung <[email protected]> Signed-off-by: Miodrag Dinic <[email protected]> Signed-off-by: Goran Ferenc <[email protected]> Signed-off-by: Aleksandar Markovic <[email protected]> Cc: Douglas Leung <[email protected]> Cc: Bo Hu <[email protected]> Cc: James Hogan <[email protected]> Cc: Jin Qian <[email protected]> Cc: Paul Burton <[email protected]> Cc: Petar Jovanovic <[email protected]> Cc: Raghu Gandham <[email protected]> Cc: <[email protected]> # 4.7+ Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/16890/ Signed-off-by: Ralf Baechle <[email protected]>
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