diff options
| author | Varadarajan Narayanan <[email protected]> | 2023-10-20 11:49:39 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-10-21 12:54:53 -0700 |
| commit | b36074357baf2794c825ea1c145de1d22b15380b (patch) | |
| tree | dcdb778128b8c9c7d8e1a4f93bef97d0680760fa /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 62073bc9f1ecc0d91fc260e7ae380cbadd33e9fc (diff) | |
arm64: dts: qcom: ipq9574: populate the opp table based on the eFuse
IPQ95xx SoCs have different OPPs available for the CPU based on
SoC variant. This can be determined from an eFuse register
present in the silicon.
Add support to read the eFuse and populate the OPPs based on it.
Frequency 1.2GHz 1.8GHz 1.5GHz No opp-supported-hw
Limit
------------------------------------------------------------
936000000 1 1 1 1 0xf
1104000000 1 1 1 1 0xf
1200000000 1 1 1 1 0xf
1416000000 0 1 1 1 0x7
1488000000 0 1 1 1 0x7
1800000000 0 1 0 1 0x5
2208000000 0 0 0 1 0x1
-----------------------------------------------------------
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Kathiravan T <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/14ab08b7cfd904433ca6065fac798d4f221c9d95.1697781921.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions