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| author | Suzuki K Poulose <[email protected]> | 2023-06-05 14:30:30 +0100 |
|---|---|---|
| committer | Suzuki K Poulose <[email protected]> | 2023-06-07 12:07:10 +0100 |
| commit | ab5ca6268afcc470e7c9b2d66b0eb9f178755260 (patch) | |
| tree | 937591f49a04b6bb8215ef2ea5961d5be7691961 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | c5f231f1a7e18d28e02b282d33541d31358360e4 (diff) | |
coresight: etm4x: Match all ETM4 instances based on DEVARCH and DEVTYPE
Instead of adding the PIDs forever to the list for the new CPUs, let us detect
a component to be ETMv4 based on the CoreSight CID, DEVTYPE=PE_TRACE and
DEVARCH=ETMv4. This is already done for some of the ETMs. We can extend the PID
matching to match the PIDR2:JEDEC, BIT[3], which must be 1 (RAO) always.
Link: https://lkml.kernel.org/r/[email protected]
Cc: Anshuman Khandual <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: Mike Leach <[email protected]>
Reviewed-by: Mike Leach <[email protected]>
[ Fixed typo in the description RA0 => RAO ]
Signed-off-by: Suzuki K Poulose <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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