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authorSuman Anna <[email protected]>2021-06-23 12:06:30 -0500
committerRob Herring <[email protected]>2021-07-15 07:35:48 -0600
commit977b3167c2bda24c3cd21e94ca7a4c25a386e812 (patch)
tree0a71bd631a5d61137846ffdd8ec7d42202092233 /tools/perf/scripts/python/bin/stackcollapse-record
parentfac4e24dcc56b59cfc5f0cbd559a89adc0fc63bf (diff)
dt-bindings: irqchip: Update pruss-intc binding for K3 AM64x SoCs
The K3 AM64x SoCs also have a ICSSG IP that is similar to existing K3 AM65x and J721E SoCs. The ICSSG interrupt controller is identical to that of the INTC on J721E SoCs, and supports 20 host interrupts and 160 input events from various SoC interrupt sources. All the 8 output host interrupts are routed to multiple entities though. Update the PRUSS interrupt controller binding with this information, though the same K3 compatible shall be used for the ICSSG INTC on AM64x SoCs. Signed-off-by: Suman Anna <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
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