diff options
| author | Dave Stevenson <[email protected]> | 2022-12-07 12:53:15 +0100 |
|---|---|---|
| committer | Maxime Ripard <[email protected]> | 2023-01-09 15:21:30 +0100 |
| commit | 87551ec650bb87d35f1b29bba6a2430896e08da0 (patch) | |
| tree | 2e72db976329d769ea22a71b43ad432046f3da99 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 982ee94486863a41c6af9f2ab3f6681f72bc5c48 (diff) | |
drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5
HVS5 has moved the interrupt enable bits around within the
DISPCTRL register, therefore the configuration has to be updated
to account for this.
Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5")
Signed-off-by: Dave Stevenson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Maxime Ripard <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions