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| author | Danny Lin <[email protected]> | 2020-12-20 16:29:06 -0800 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2021-01-05 16:36:18 -0600 |
| commit | 81188f585d023f6bf403cb1c79e5037dfd5819ff (patch) | |
| tree | e881c019c1b2aec9603aba66f132391263312e44 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 066d21bcf605727814af2a4d44e96ba578f9103d (diff) | |
arm64: dts: qcom: sm8150: Add PSCI idle states
Like other Qualcomm SoCs, sm8150 exposes CPU and cluster idle states
through PSCI. Define the idle states to save power when the CPU is not
in active use.
These idle states, latency, and residency values match the downstream
4.14 kernel from Qualcomm as of LA.UM.8.1.r1-15600-sm8150.0.
It's worth noting that the CPU has an additional C3 power collapse idle
state between WFI and rail power collapse (with PSCI mode 0x40000003),
but it is not officially used in downstream kernels due to "thermal
throttling issues."
Signed-off-by: Danny Lin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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