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| author | Peter Ujfalusi <[email protected]> | 2023-03-10 15:34:54 +0200 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2023-03-10 14:33:16 +0000 |
| commit | 75034eb5e4c267d4ab93085b5d6fa3dab2535b34 (patch) | |
| tree | 1c78912c740d3061586145019221a2eebd432bf1 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 8987986b07f5dded3f81b159f5bb146f2d1a21ed (diff) | |
ASoC: SOF: Intel: MTL: Don't access EM2
This reverts commit 2b5a30cafb2ef ("ASoC: SOF: Intel: MTL: Enable
DMI L1").
It came to our attention that the access to the EM2 register is restricted
to the DSP side on MTL compared to prior platforms.
Writing to it from the host side has no effect (negative or positive), it
is better to remove the code to not cause confusion and wrong impression.
Signed-off-by: Peter Ujfalusi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions