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authorAshutosh Dixit <[email protected]>2023-02-16 08:49:44 -0800
committerRodrigo Vivi <[email protected]>2023-02-16 16:53:51 -0500
commit6fd3d8bf89fc6525264552910accb09c93abba02 (patch)
tree47a793a1ad66258c6bfeed45a33f1010d5ca0d69 /tools/perf/scripts/python/bin/stackcollapse-record
parentf99926383bd62d2b707e4599b4e096e943f63d42 (diff)
drm/i915/hwmon: Enable PL1 limit when writing limit value to HW
Previous documentation suggested that the PL1 power limit is always enabled in HW. However we now find this not to be the case on some platforms (such as ATSM). Therefore enable the PL1 power limit (by setting the enable bit) when writing the PL1 limit value to HW. Bspec: 51864 Signed-off-by: Ashutosh Dixit <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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