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| author | Ville Syrjälä <[email protected]> | 2021-01-11 18:37:11 +0200 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2021-01-29 19:05:02 +0200 |
| commit | 6ede6b0616b23611560ec9dc4053ae35651810d2 (patch) | |
| tree | 36d6f9473cd6f6e896bb5210b2210de8b5982cf6 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 4bb18054adc4939a3c1f895d8d0a1556a5f8b26a (diff) | |
drm/i915: Implement async flips for vlv/chv
Add support for async flips on vlv/chv. Unlike all the other
platforms vlv/chv do not use the async flip bit in DSPCNTR and
instead we select between async vs. sync flips based on the
surface address register. The normal DSPSURF generates sync
flips DSPADDR_VLV generates async flips. And as usual the
interrupt bits are different from the other platforms.
Cc: Karthik B S <[email protected]>
Cc: Vandita Kulkarni <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Reviewed-by: Karthik B S <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions