diff options
| author | Finn Thain <[email protected]> | 2020-09-05 09:02:20 +1000 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2020-09-15 22:13:24 +1000 |
| commit | 66943005cc41f48e4d05614e8f76c0ca1812f0fd (patch) | |
| tree | a63a21bc0a6c699e1a0043b2b06701a7c85b5554 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | b32d5d7e920a364287f6206af2d20179978a617d (diff) | |
powerpc/tau: Use appropriate temperature sample interval
According to the MPC750 Users Manual, the SITV value in Thermal
Management Register 3 is 13 bits long. The present code calculates the
SITV value as 60 * 500 cycles. This would overflow to give 10 us on
a 500 MHz CPU rather than the intended 60 us. (But according to the
Microprocessor Datasheet, there is also a factor of 266 that has to be
applied to this value on certain parts i.e. speed sort above 266 MHz.)
Always use the maximum cycle count, as recommended by the Datasheet.
Fixes: 1da177e4c3f41 ("Linux-2.6.12-rc2")
Signed-off-by: Finn Thain <[email protected]>
Tested-by: Stan Johnson <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/896f542e5f0f1d6cf8218524c2b67d79f3d69b3c.1599260540.git.fthain@telegraphics.com.au
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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