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| author | Daniele Ceraolo Spurio <[email protected]> | 2019-07-13 11:00:10 +0100 |
|---|---|---|
| committer | Chris Wilson <[email protected]> | 2019-07-13 19:58:08 +0100 |
| commit | 633023a4e61885c0c9ceefed0865ec0063940616 (patch) | |
| tree | db8ae93ecfd9abba879020b3fd07748aee99d0dd /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 9cbd51c2c0edbafdaab7f0fa7569d1f455113a9b (diff) | |
drm/i915/guc: unify guc irq handling
The 16-bit guc irq vector is unchanged across gens, the only thing that
moved is its position (from the upper 16 bits of the PM regs to its own
register). Instead of duplicating all defines and functions to handle
the 2 different positions, we can work on the vector and shift it as
appropriate. While at it, update the handler to work on intel_guc.
Signed-off-by: Daniele Ceraolo Spurio <[email protected]>
Cc: Michal Wajdeczko <[email protected]>
Reviewed-by: Michal Wajdeczko <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Signed-off-by: Chris Wilson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions