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| author | Chris Wilson <[email protected]> | 2017-03-10 11:55:18 +0000 |
|---|---|---|
| committer | Chris Wilson <[email protected]> | 2017-03-10 13:02:34 +0000 |
| commit | 504ae4024131c5a01c3ce8382d49b801375e039c (patch) | |
| tree | 7d79d1adcac7c7e74d6f3d91a691273f605fb5c9 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | b8473050805f35add97f3ff57570d55a01808df5 (diff) | |
drm/i915/cmdparser: Limit clflush to active cachelines
We only need to clflush those cachelines that we have validated to be
read by the GPU. Userspace typically fills the batch length in
correctly, the exceptions tend to be explicit tests within igt.
v2: Use ptr_mask_bits() to make Mika happy
v3: cmd is not advanced on MI_BBE, so make sure to include an extra
dword in the clflush.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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