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| author | Jonathan Cameron <[email protected]> | 2022-08-07 16:12:17 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-08-15 22:30:01 +0100 |
| commit | 48a1319164d9339ad50a25085cad6b879fef9fbe (patch) | |
| tree | 84589864d17e7a607ce8e0938bd62205918e6d7a /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | e48668a38bf420c660b07851985e6922fcf4b194 (diff) | |
staging: iio: meter: ade7854: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Signed-off-by: Jonathan Cameron <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Cc: Rodrigo Siqueira <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
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