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| author | Mauro Carvalho Chehab <[email protected]> | 2021-07-18 13:40:48 +0200 |
|---|---|---|
| committer | Rob Herring <[email protected]> | 2021-07-19 15:55:34 -0600 |
| commit | 42694f9f6407a933ce0880e12c2aaef01073ec28 (patch) | |
| tree | c2d815fca2314c0b8bfaa35c1dfc676c4e89f37a /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | cc6ef3d1fdde75ca4783f2d98d194b4a2c35d848 (diff) | |
dt-bindings: PCI: add snps,dw-pcie.yaml
Currently, the designware schema is defined on a text file:
designware-pcie.txt
Convert the pci-bus part into a schema.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Link: https://lore.kernel.org/r/53363a7609176ca56c47ef57287466ee84087dc5.1626608375.git.mchehab+huawei@kernel.org
Signed-off-by: Rob Herring <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions