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| author | Akshu Agrawal <[email protected]> | 2018-06-21 12:58:17 +0800 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2018-06-22 15:48:26 +0100 |
| commit | 2718c89a233bf8549fdba0925947b2c3cb887a95 (patch) | |
| tree | e4d27d6ad4f35343bafc7ec6cad3ebbea860a164 /tools/perf/scripts/python/bin/stackcollapse-record | |
| parent | 44fedd7da485bafcc5eee8794fa54cfc0c047dd4 (diff) | |
ASoC: AMD: Configure channel 1 or channel 0 for capture
ST/CZ SoC have 2 channels for capture in the I2SSP path.
The DMA though these channels is done using the same dma
descriptors.
We configure the channel and enable it on the basis of
channel selected by machine driver. Machine driver knows
which codec sits on which channel and thus sends the information
to dma driver.
Signed-off-by: Akshu Agrawal <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/stackcollapse-record')
0 files changed, 0 insertions, 0 deletions