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authorIsabel Zhang <[email protected]>2020-01-27 10:57:16 -0500
committerAlex Deucher <[email protected]>2020-02-06 15:04:38 -0500
commit15add0c2fed34adf02c8eccb399482b6e7b369bf (patch)
tree94433867555900c7675489899f2f20e77d37c594 /tools/perf/scripts/python/bin/stackcollapse-record
parent85e148fb963d27152a14e6d399a47aed9bc99c15 (diff)
drm/amd/display: Add initialitions for PLL2 clock source
[Why] Starting from 14nm, the PLL is built into the PHY and the PLL is mapped to PHY on 1 to 1 basis. In the code, the DP port is mapped to a PLL that was not initialized. This causes DP to HDMI dongle to not light up the display. [How] Initializations added for PLL2 when creating resources. Signed-off-by: Isabel Zhang <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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