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| author | Alex Helms <[email protected]> | 2022-09-12 11:36:13 -0700 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2022-09-30 17:34:35 -0700 |
| commit | 48c5e98fedd9e0b164df4de592fd740537ead9e2 (patch) | |
| tree | fff3052e2ae08d04e60d8e87671dcb990e4b8d3d /tools/perf/scripts/python/bin/export-to-sqlite-report | |
| parent | 09d1855656dad04127aee195baf2eedae029175d (diff) | |
clk: Renesas versaclock7 ccf device driver
Renesas Versaclock7 is a family of configurable clock generator ICs
with fractional and integer dividers. This driver has basic support
for the RC21008A device, a clock synthesizer with a crystal input and
8 outputs. The supports changing the FOD and IOD rates, and each
output can be gated.
Signed-off-by: Alex Helms <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Tested-by: Saeed Nowshadi <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-sqlite-report')
0 files changed, 0 insertions, 0 deletions