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| author | Thierry Reding <treding@nvidia.com> | 2021-12-07 15:01:37 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-16 16:51:02 +0100 |
| commit | 28a44b900e572ecb163cc4e042365b7df6e0fad3 (patch) | |
| tree | 49c767bb0c11a866925c058b6909913922f16e53 /tools/perf/scripts/python/bin/export-to-sqlite-report | |
| parent | 9c1b3ef8e204ca952d0304d4b92fa54de8b9815a (diff) | |
arm64: tegra: Add missing TSEC properties on Tegra210
Add missing interrupts, clocks, clock-names, reset and reset-names
properties for the TSEC blocks found on Tegra210.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-sqlite-report')
0 files changed, 0 insertions, 0 deletions