diff options
| author | JC Kuo <[email protected]> | 2021-01-15 18:19:07 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2021-01-15 17:27:31 +0100 |
| commit | da7e0c3c2909a3d9bf8acfe1db3cb213bd7febfb (patch) | |
| tree | 24e5f2fab57ac22e0f85ee2d8e7cc746f4fb4057 /tools/perf/scripts/python/bin/export-to-postgresql-report | |
| parent | 576667bad341516edc4e18eb85acb0a2b4c9c9d9 (diff) | |
xhci: tegra: Delay for disabling LFPS detector
Occasionally, we are seeing some SuperSpeed devices resumes right after
being directed to U3. This commits add 500us delay to ensure LFPS
detector is disabled before sending ACK to firmware.
[ 16.099363] tegra-xusb 70090000.usb: entering ELPG
[ 16.104343] tegra-xusb 70090000.usb: 2-1 isn't suspended: 0x0c001203
[ 16.114576] tegra-xusb 70090000.usb: not all ports suspended: -16
[ 16.120789] tegra-xusb 70090000.usb: entering ELPG failed
The register write passes through a few flop stages of 32KHz clock domain.
NVIDIA ASIC designer reviewed RTL and suggests 500us delay.
Cc: [email protected]
Signed-off-by: JC Kuo <[email protected]>
Signed-off-by: Mathias Nyman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
0 files changed, 0 insertions, 0 deletions