diff options
| author | Paul Walmsley <[email protected]> | 2015-05-19 14:43:30 +0300 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2015-07-16 09:32:48 +0200 |
| commit | a3c83ff20c64a0ea3580aa7ed2953ff1602334dd (patch) | |
| tree | 430475bf09ce175b8d6e1436693da8401b865ea9 /tools/perf/scripts/python/bin/export-to-postgresql-report | |
| parent | 66b6f3d07454a66ec029543c653d3bce7e6cb3c1 (diff) | |
clk: tegra: Add DFLL DVCO reset control for Tegra124
The DVCO present in the DFLL IP block has a separate reset line,
exposed via the CAR IP block. This reset line is asserted upon SoC
reset. Unless something (such as the DFLL driver) deasserts this
line, the DVCO will not oscillate, although reads and writes to the
DFLL IP block will complete.
Thanks to Aleksandr Frid <[email protected]> for identifying this and
saving hours of debugging time.
Signed-off-by: Paul Walmsley <[email protected]>
[ttynkkynen: ported to tegra124 from tegra114]
Signed-off-by: Tuomas Tynkkynen <[email protected]>
[mikko.perttunen: ported to special reset callback]
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
0 files changed, 0 insertions, 0 deletions