diff options
author | Marek Vasut <[email protected]> | 2019-09-26 00:08:42 +0200 |
---|---|---|
committer | David S. Miller <[email protected]> | 2019-09-27 20:21:07 +0200 |
commit | a3aa6e65beebf3780026753ebf39db19f4c92990 (patch) | |
tree | d919147ab33e385154001904fc0dfe4d156c65a3 /tools/perf/scripts/python/bin/export-to-postgresql-report | |
parent | c5f095baa880036702595a09de38e7a0ca420c0b (diff) |
net: dsa: microchip: Always set regmap stride to 1
The regmap stride is set to 1 for regmap describing 8bit registers already.
However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
is not correct, as the switch protocol supports unaligned register reads
and writes and the KSZ87xx even uses such unaligned register accesses to
read e.g. MIB counter.
This patch fixes MIB counter access on KSZ87xx.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: David S. Miller <[email protected]>
Cc: Florian Fainelli <[email protected]>
Cc: George McCollister <[email protected]>
Cc: Tristram Ha <[email protected]>
Cc: Vivien Didelot <[email protected]>
Cc: Woojung Huh <[email protected]>
Fixes: 46558d601cb6 ("net: dsa: microchip: Initial SPI regmap support")
Fixes: 255b59ad0db2 ("net: dsa: microchip: Factor out regmap config generation into common header")
Reviewed-by: George McCollister <[email protected]>
Tested-by: George McCollister <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
0 files changed, 0 insertions, 0 deletions