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authorVladimir Oltean <[email protected]>2024-06-15 20:00:27 +0800
committerPaolo Abeni <[email protected]>2024-06-18 13:28:26 +0200
commit777b8afb8179155353ec14b1d8153122410aba29 (patch)
tree8d65d57afc43502f02fec7126a1c821e50531b94 /tools/perf/scripts/python/bin/export-to-postgresql-report
parent041cc86b3653cbcdf6ab96c2f2ae34f3d0a99b0a (diff)
net: phy: introduce core support for phy-mode = "10g-qxgmii"
10G-QXGMII is a MAC-to-PHY interface defined by the USXGMII multiport specification. It uses the same signaling as USXGMII, but it multiplexes 4 ports over the link, resulting in a maximum speed of 2.5G per port. Some in-tree SoCs like the NXP LS1028A use "usxgmii" when they mean either the single-port USXGMII or the quad-port 10G-QXGMII variant, and they could get away just fine with that thus far. But there is a need to distinguish between the 2 as far as SerDes drivers are concerned. Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: Luo Jie <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Russell King (Oracle) <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
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