diff options
| author | Libin Yang <[email protected]> | 2016-01-29 20:39:09 +0800 |
|---|---|---|
| committer | Takashi Iwai <[email protected]> | 2016-01-29 14:00:41 +0100 |
| commit | 6639484ddaf6707b41082c9fa9ca9af342df6402 (patch) | |
| tree | 833c0a8964f6939c95c14f393439ca9cac7185c2 /tools/perf/scripts/python/bin/export-to-postgresql-report | |
| parent | 3ec622f40913ae036f218e5e7e92df9c1f1753d9 (diff) | |
ALSA: hda - disable dynamic clock gating on Broxton before reset
On Broxton, to make sure the reset controller works properly,
MISCBDCGE bit (bit 6) in CGCTL (0x48) of PCI configuration space
need be cleared before reset and set back to 1 after reset.
Otherwise, it may prevent the CORB/RIRB logic from being reset.
Signed-off-by: Libin Yang <[email protected]>
Cc: <[email protected]> # v4.4+
Signed-off-by: Takashi Iwai <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
0 files changed, 0 insertions, 0 deletions