diff options
| author | Stefan Agner <[email protected]> | 2016-03-09 18:16:47 -0800 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2016-03-31 17:01:55 +0800 |
| commit | 456829228f96702ca281b65e11d11e8c09ca9da0 (patch) | |
| tree | 65784e1d35f7199f9daf3cc363269a7982b48dfb /tools/perf/scripts/python/bin/export-to-postgresql-report | |
| parent | 0b55257ebc66d333e86415b0fdf46450ca807059 (diff) | |
clk: imx: clk-gate2: allow custom gate configuration
The 2-bit gates found i.MX and Vybrid SoC support different clock
configuration:
0b00: clk disabled
0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode
0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid)
0b11: clk enabled in RUN and WAIT mode
For some clocks, we might want to configure different behaviour,
e.g. a memory clock should be on even in STOP mode. Add a new
function imx_clk_gate2_cgr which allow to configure specific
gate values through the cgr_val parameter.
Signed-off-by: Stefan Agner <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
0 files changed, 0 insertions, 0 deletions