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authorMaxime Ripard <maxime.ripard@bootlin.com>2018-04-03 14:32:11 +0200
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-04-10 16:32:25 +0200
commit22f88e311399d4f68abc662934253f553edb18f2 (patch)
tree90c0b50a4104e18676f7f3ef41b42f92a438e7ac /tools/perf/scripts/python/bin/export-to-postgresql-report
parent493ab13a5d382f1a06c4cb791f277acec55b9250 (diff)
ARM: dts: sun5i: Add the MBUS controller
The MBUS (and its associated controller) is the bus in the Allwinner SoCs that DMA devices use in the system to access the memory. Among other things (and depending on the SoC generation), it can also enforce priorities or report bandwidth usages on a per-master basis. One of the most notable thing is that instead of having the same mapping for the RAM than the CPU, it maps it at address 0, which means we'll have to do address translation thanks to the dma-ranges property. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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