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authorAlex Elder <[email protected]>2021-03-28 12:31:10 -0500
committerDavid S. Miller <[email protected]>2021-03-28 18:12:03 -0700
commit19aaf72c0c7a26ab7ffc655a6d84da6a379f899b (patch)
tree6dac908c510eb28856e9d884b9c6193a7bbd0b9b /tools/perf/scripts/python/bin/export-to-postgresql-report
parent782d767a2d0fb08bc4d5d26f789769a84b88400b (diff)
net: ipa: DMA addresses are nicely aligned
A recent patch avoided doing 64-bit modulo operations by checking the alignment of some DMA allocations using only the lower 32 bits of the address. David Laight pointed out (after the fix was committed) that DMA allocations might already satisfy the alignment requirements. And he was right. Remove the alignment checks that occur after DMA allocation requests, and update comments to explain why the constraint is satisfied. The only place IPA_TABLE_ALIGN was used was to check the alignment; it is therefore no longer needed, so get rid of it. Add comments where GSI_RING_ELEMENT_SIZE and the tre_count and event_count channel data fields are defined to make explicit they are required to be powers of 2. Revise a comment in gsi_trans_pool_init_dma(), taking into account that dma_alloc_coherent() guarantees its result is aligned to a page size (or order thereof). Don't bother printing an error if a DMA allocation fails. Suggested-by: David Laight <[email protected]> Signed-off-by: Alex Elder <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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