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authorMartin Blumenstingl <[email protected]>2020-04-17 20:41:27 +0200
committerJerome Brunet <[email protected]>2020-04-29 10:26:53 +0200
commit16afd70af5b21b6d73a03b9c36f78b9cf004a0dd (patch)
treea5f3d71ac5d846d3185682d5282def0833547a4a /tools/perf/scripts/python/bin/export-to-postgresql-report
parent8bb629cfb28f4dad9d47f69249366e50ae5edc25 (diff)
clk: meson: meson8b: Make the CCF use the glitch-free VPU mux
The "vpu_0" or "vpu_1" clock trees should not be updated while the clock is running. Enforce this by setting CLK_SET_RATE_GATE on the "vpu_0" and "vpu_1" gates. This makes the CCF switch to the "vpu_1" tree when "vpu_0" is currently active and vice versa, which is exactly what the vendor driver does when updating the frequency of the VPU clock. Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Jerome Brunet <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
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