diff options
| author | Tuomas Tynkkynen <[email protected]> | 2015-05-13 17:58:35 +0300 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2015-07-16 09:32:43 +0200 |
| commit | 0c59d26770333cf605d9119a78dd6c1ebebc6a61 (patch) | |
| tree | 729c4e51baf9c05f2362cd6e9b1248130a59d7c6 /tools/perf/scripts/python/bin/export-to-postgresql-report | |
| parent | d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754 (diff) | |
clk: tegra: Add binding for the Tegra124 DFLL clocksource
The DFLL is the main clocksource for the fast CPU cluster on Tegra124
and also provides automatic CPU rail voltage scaling as well. The DFLL
is a separate IP block from the usual Tegra124 clock-and-reset
controller, so it gets its own node in the device tree.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/bin/export-to-postgresql-report')
0 files changed, 0 insertions, 0 deletions