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| author | Linus Torvalds <[email protected]> | 2017-07-03 16:50:31 -0700 | 
|---|---|---|
| committer | Linus Torvalds <[email protected]> | 2017-07-03 16:50:31 -0700 | 
| commit | 03ffbcdd7898c0b5299efeb9f18de927487ec1cf (patch) | |
| tree | 0569222e4dc9db22049d7d8d15920cc085a194f6 /tools/perf/scripts/python/bin/compaction-times-record | |
| parent | 1b044f1cfc65a7d90b209dfabd57e16d98b58c5b (diff) | |
| parent | f9632de40ee0161e864bea8c1b017d957fd7312c (diff) | |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
 "The irq department delivers:
   - Expand the generic infrastructure handling the irq migration on CPU
     hotplug and convert X86 over to it. (Thomas Gleixner)
     Aside of consolidating code this is a preparatory change for:
   - Finalizing the affinity management for multi-queue devices. The
     main change here is to shut down interrupts which are affine to a
     outgoing CPU and reenabling them when the CPU comes online again.
     That avoids moving interrupts pointlessly around and breaking and
     reestablishing affinities for no value. (Christoph Hellwig)
     Note: This contains also the BLOCK-MQ and NVME changes which depend
     on the rework of the irq core infrastructure. Jens acked them and
     agreed that they should go with the irq changes.
   - Consolidation of irq domain code (Marc Zyngier)
   - State tracking consolidation in the core code (Jeffy Chen)
   - Add debug infrastructure for hierarchical irq domains (Thomas
     Gleixner)
   - Infrastructure enhancement for managing generic interrupt chips via
     devmem (Bartosz Golaszewski)
   - Constification work all over the place (Tobias Klauser)
   - Two new interrupt controller drivers for MVEBU (Thomas Petazzoni)
   - The usual set of fixes, updates and enhancements all over the
     place"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (112 commits)
  irqchip/or1k-pic: Fix interrupt acknowledgement
  irqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap
  irqchip/gic-v3: Fix out-of-bound access in gic_set_affinity
  nvme: Allocate queues for all possible CPUs
  blk-mq: Create hctx for each present CPU
  blk-mq: Include all present CPUs in the default queue mapping
  genirq: Avoid unnecessary low level irq function calls
  genirq: Set irq masked state when initializing irq_desc
  genirq/timings: Add infrastructure for estimating the next interrupt arrival time
  genirq/timings: Add infrastructure to track the interrupt timings
  genirq/debugfs: Remove pointless NULL pointer check
  irqchip/gic-v3-its: Don't assume GICv3 hardware supports 16bit INTID
  irqchip/gic-v3-its: Add ACPI NUMA node mapping
  irqchip/gic-v3-its-platform-msi: Make of_device_ids const
  irqchip/gic-v3-its: Make of_device_ids const
  irqchip/irq-mvebu-icu: Add new driver for Marvell ICU
  irqchip/irq-mvebu-gicp: Add new driver for Marvell GICP
  dt-bindings/interrupt-controller: Add DT binding for the Marvell ICU
  genirq/irqdomain: Remove auto-recursive hierarchy support
  irqchip/MSI: Use irq_domain_update_bus_token instead of an open coded access
  ...
Diffstat (limited to 'tools/perf/scripts/python/bin/compaction-times-record')
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