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| author | Marek Vasut <[email protected]> | 2022-03-25 18:58:51 +0100 |
|---|---|---|
| committer | Alexandre Torgue <[email protected]> | 2022-04-19 17:21:12 +0200 |
| commit | ef2d90708883f4025a801feb0ba8411a7a4387e1 (patch) | |
| tree | 60424389f0d3152b8d9d967bee9b0cba92f79cf9 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 42da167bbd2910e4ac6334174f6dc273e079fb91 (diff) | |
ARM: dts: stm32: Fix PHY post-reset delay on Avenger96
Per KSZ9031RNX PHY datasheet FIGURE 7-5: POWER-UP/POWER-DOWN/RESET TIMING
Note 2: After the de-assertion of reset, wait a minimum of 100 μs before
starting programming on the MIIM (MDC/MDIO) interface.
Add 1ms post-reset delay to guarantee this figure.
Fixes: 010ca9fe500bf ("ARM: dts: stm32: Add missing ethernet PHY reset on AV96")
Signed-off-by: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Patrice Chotard <[email protected]>
Cc: Patrick Delaunay <[email protected]>
Cc: [email protected]
To: [email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions