diff options
| author | Charlie Jenkins <[email protected]> | 2024-01-08 15:57:04 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2024-01-17 17:52:31 -0800 |
| commit | e11e367e9fe57164ea609807ed27184c85263355 (patch) | |
| tree | 312cbe8e5587361b9be7375b14c77f1079fb8a29 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 2ce5729fce8f62b5118f56110d16006c0e22c522 (diff) | |
riscv: Add checksum header
Provide checksum algorithms that have been designed to leverage riscv
instructions such as rotate. In 64-bit, can take advantage of the larger
register to avoid some overflow checking.
Signed-off-by: Charlie Jenkins <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Reviewed-by: Xiao Wang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions