diff options
author | Suzuki K Poulose <[email protected]> | 2021-10-19 17:31:40 +0100 |
---|---|---|
committer | Will Deacon <[email protected]> | 2021-10-21 17:49:16 +0100 |
commit | b9d216fcef4298de76519e2baeed69ba482467bd (patch) | |
tree | 55cc86394df4fb4e147ea3ece4b54f548d623db6 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
parent | 2d0d656700d67239a57afaf617439143d8dac9be (diff) |
arm64: errata: Add detection for TRBE overwrite in FILL mode
Arm Neoverse-N2 and the Cortex-A710 cores are affected
by a CPU erratum where the TRBE will overwrite the trace buffer
in FILL mode. The TRBE doesn't stop (as expected in FILL mode)
when it reaches the limit and wraps to the base to continue
writing upto 3 cache lines. This will overwrite any trace that
was written previously.
Add the Neoverse-N2 erratum(#2139208) and Cortex-A710 erratum
(#2119858) to the detection logic.
This will be used by the TRBE driver in later patches to work
around the issue. The detection has been kept with the core
arm64 errata framework list to make sure :
- We don't duplicate the framework in TRBE driver
- The errata detection is advertised like the rest
of the CPU errata.
Note that the Kconfig entries are not fully active until the
TRBE driver implements the work around.
Cc: Will Deacon <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Anshuman Khandual <[email protected]>
Cc: Catalin Marinas <[email protected]>
Cc: Mathieu Poirier <[email protected]>
Cc: Mike Leach <[email protected]>
cc: Leo Yan <[email protected]>
Acked-by: Catalin Marinas <[email protected]>
Reviewed-by: Mathieu Poirier <[email protected]>
Reviewed-by: Anshuman Khandual <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions