diff options
| author | Siddharth Vadapalli <[email protected]> | 2024-10-10 20:35:43 +0530 |
|---|---|---|
| committer | Paolo Abeni <[email protected]> | 2024-10-15 12:43:59 +0200 |
| commit | 97802ffca711cb3fd8adfd9db38e005970d59743 (patch) | |
| tree | f4061e287f2ae978fd345a2b51e49ab147196690 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 1758af47b98c17da464cb45f476875150955dd48 (diff) | |
net: ethernet: ti: am65-cpsw: Enable USXGMII mode for J7200 CPSW5G
TI's J7200 SoC supports USXGMII mode. Add USXGMII mode to the
extra_modes member of the J7200 SoC data.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Paolo Abeni <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions