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authorDragan Cvetic <[email protected]>2019-06-11 18:29:35 +0100
committerGreg Kroah-Hartman <[email protected]>2019-06-21 16:07:11 +0200
commit7a82a01e5c850986d4b53dab52ac71294285586f (patch)
tree54db53f13d20856880706e061379dd8f0f4093d3 /tools/perf/scripts/python/arm-cs-trace-disasm.py
parent1c2eb5b2853c9f513690ba6b71072d8eb65da16a (diff)
dt-bindings: xilinx-sdfec: Add SDFEC binding
Add the Soft Decision Forward Error Correction (SDFEC) Engine bindings which is available for the Zynq UltraScale+ RFSoC FPGA's. Signed-off-by: Dragan Cvetic <[email protected]> Signed-off-by: Derek Kiernan <[email protected]> Reviewed-by: Rob Herring <[email protected]> .../devicetree/bindings/misc/xlnx,sd-fec.txt | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt Signed-off-by: Greg Kroah-Hartman <[email protected]>
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