diff options
| author | Andrew Jones <ajones@ventanamicro.com> | 2024-04-26 12:08:22 +0200 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-07-12 03:16:41 -0700 |
| commit | 6d5852811600086f0a227a4d646b2a20b4dfe533 (patch) | |
| tree | 8f39952f9e09bdfd738bfebcd01ac0002b8bfaad /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 6da111574baffb3399a6bd03a98b269eac9713f2 (diff) | |
dt-bindings: riscv: Add Zawrs ISA extension description
Add description for the Zawrs (Wait-on-Reservation-Set) ISA extension
which was ratified in commit 98918c844281 of riscv-isa-manual.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240426100820.14762-10-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions