diff options
| author | Raju Rangoju <[email protected]> | 2024-09-25 19:06:44 +0530 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2024-09-30 01:11:56 +0200 |
| commit | 6c30eee359127c31cd8c6b586c8c3ced9f50f74b (patch) | |
| tree | 9937dc9ad36f80bfe2d0eb055c57035f8c2d55e1 /tools/perf/scripts/python/arm-cs-trace-disasm.py | |
| parent | 9674f1694e644aa5cc50e1009481cb4c5b4e8f8f (diff) | |
spi: spi_amd: Add HIDDMA basic read support
SPI index mode has hardware limitation of reading only 64 bytes per
transaction due to fixed number of FIFO registers. This constraint leads
to performance issues when reading data from NAND/NOR flash devices, as the
controller must issue multiple requests to read 64-byte chunks, even if the
slave can send up to 2 or 4 KB in single transaction. The AMD HID2 SPI
controller supports DMA mode, which allows reading up to 4 KB of data in
single transaction. This patch introduces changes to implement HID2 DMA
read support for the HID2 SPI controller.
Co-developed-by: Krishnamoorthi M <[email protected]>
Signed-off-by: Krishnamoorthi M <[email protected]>
Co-developed-by: Akshata MukundShetty <[email protected]>
Signed-off-by: Akshata MukundShetty <[email protected]>
Signed-off-by: Raju Rangoju <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/arm-cs-trace-disasm.py')
0 files changed, 0 insertions, 0 deletions