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authorBjorn Andersson <[email protected]>2021-10-01 10:43:56 -0700
committerRob Clark <[email protected]>2021-10-15 13:26:34 -0700
commit687825c402f19f74861514771d2a37eca178bbd6 (patch)
tree591148e52230006047f4af98ba6e9269ae5ebd10 /tools/perf/scripts/python/arm-cs-trace-disasm.py
parentb6816441a14bbe356ba8590de79cfea2de6a085c (diff)
dt-bindings: msm/dp: Change reg definition
reg was defined as one region covering the entire DP block, but the memory map is actually split in 4 regions and obviously the size of these regions differs between platforms. Switch the reg to require that all four regions are specified instead. It is expected that the implementation will handle existing DTBs, even though the schema defines the new layout. Reviewed-by: Stephen Boyd <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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