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authorSteen Hegelund <[email protected]>2022-10-20 15:09:02 +0200
committerDavid S. Miller <[email protected]>2022-10-24 10:37:43 +0100
commit683e05c03275d79e603d7e0211d7aed410b0e65b (patch)
tree918f6ffee2f27ec8ccba569944a8673895e768b1 /tools/perf/scripts/python/arm-cs-trace-disasm.py
parent8e10490b006477c42874d43a2ab4d4c6d51ccb63 (diff)
net: microchip: sparx5: Writing rules to the IS2 VCAP
This adds rule encoding functionality to the VCAP API. A rule consists of keys and actions in separate cache sections. The maximum size of the keyset or actionset determines the size of the rule. The VCAP hardware need to be able to distinguish different rule sizes from each other, and for that purpose some extra typegroup bits are added to the rule when it is encoded. The API provides a bit stream iterator that allows highlevel encoding functionality to add key and action value bits independent of typegroup bits. This is handled by letting the concrete VCAP model provide the typegroup table for the different rule sizes. After the key and action values have been added to the encoding bit streams the typegroup bits are set to their correct values just before the rule is written to the VCAP hardware. The key and action offsets provided in the VCAP model are the offset before adding the typegroup bits. Signed-off-by: Steen Hegelund <[email protected]> Tested-by: Casper Andersson <[email protected]> Reviewed-by: Casper Andersson <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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