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authorEvan Quan <[email protected]>2020-07-03 14:53:06 +0800
committerAlex Deucher <[email protected]>2020-07-15 12:43:59 -0400
commit0b590970a519dee488dd21a43c55de9f62ff82fa (patch)
treee96793d301d66ce79c7080e66eb21a40f8e84a96 /tools/perf/scripts/python/arm-cs-trace-disasm.py
parent778f8e6afea64e432d28f69e1c55688e4e9283d5 (diff)
drm/amd/powerplay: correct the supported pcie GenSpeed and LaneCount
The LCLK dpm table setup should be performed in .update_pcie_parameters(). Otherwise, the updated GenSpeed and LaneCount information will be lost. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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