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authorKrzysztof Kozlowski <[email protected]>2020-12-10 22:25:21 +0100
committerKrzysztof Kozlowski <[email protected]>2021-03-07 20:56:17 +0100
commite52dcd6e70fab51f53292e53336ecb007bb60889 (patch)
tree597d3a92ea0edce8a770ab2cc660a2cdd4521fc0 /tools/perf/scripts/python/Perf-Trace-Util/lib
parent15107e443ab8c6cb35eff10438993e4bc944d9ae (diff)
ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
The Maxim PMIC datasheets describe the interrupt line as active low with a requirement of acknowledge from the CPU. Without specifying the interrupt type in Devicetree, kernel might apply some fixed configuration, not necessarily working for this hardware. Additionally, the interrupt line is shared so using level sensitive interrupt is here especially important to avoid races. Fixes: 15dfdfad2d4a ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board") Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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